Cerebras Systems has launched the Wafer Scale Engine 3 (WSE-3), marking a major milestone in growing chips designed for generative artificial intelligence (AI).
The announcement, made on March 13, 2024, positions the WSE-3 because the world’s largest semiconductor, aimed toward advancing the capabilities of giant language fashions with tens of trillions of parameters. This improvement comes on the heels of the intensifying race within the tech trade to create extra highly effective and environment friendly AI models.
Doubling Down on Performance
The WSE-3 chip improves the efficiency of its predecessor, WSE-2, two occasions with out a rise in energy consumption or price. This accomplishment is widely known as one of the strides made per Moore’s Law, which states that chip circuitry is anticipated to change into twice as complicated roughly each 18 months.
Consequently, the WSE-3 chip, manufactured by TSMC, reveals a lower within the transistor measurement from 7 nanometers to five nanometers, which will increase the transistor depend to 4 trillion on a chip the scale of virtually a whole 12-inch semiconductor wafer. This enhance ends in a doubling of the computational energy from 62.5 petaFLOPs to 125 petaFLOPs, thus enhancing the chip’s effectivity in coaching AI fashions.
Advantages Over Competitors
Cerebras’ WSE-3 considerably surpasses the trade commonplace, Nvidia’s H100 GPU, in measurement, reminiscence, and computational capabilities. Featuring 52 occasions extra cores, 800 occasions bigger on-chip reminiscence, and important enhancements in reminiscence bandwidth and material bandwidth, the WSE-3 delivers the biggest efficiency enhancements ever focused at AI computations.
These enhancements enable the coaching of substantial neural networks, together with a hypothetical 24 trillion parameter mannequin on a single CS-3 pc system, demonstrating the huge potential of WSE-3 in rushing up AI mannequin improvement.
Innovations in AI Training and Inference
The launch of the WSE-3 is related to enhancements within the coaching and inference phases of AI mannequin improvement. Cerebras emphasizes the chip’s functionality to simplify the programming course of because it requires a lot fewer strains of code than GPUs for modeling GPT-3. The simplicity with which 2,048 machines could possibly be clustered and educated makes this design in a position to practice giant language fashions 30 occasions quicker than the present main machines.
Cerebras has moreover revealed a tie-up with Qualcomm to enhance the inference half, which is about predicting based mostly on the AI mannequin educated. Through strategies like sparsity and speculative decoding, the partnership seeks to scale back the computational prices and power utilization of generative AI fashions to the naked minimal.
As a consequence, this collaboration signifies a strategic transfer in the direction of optimizing the effectivity of AI purposes, from coaching to real-world deployment.
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